1. Field of the Invention
The present invention relates to phase lock loops, and specifically to phase lock loops using multiphase oscillators.
2. Description of Related Art
Prior art techniques for phase determination in a phase lock loop are often difficult, resource intensive, and not accurate enough. One such prior art system, disclosed in Staszewski et al. (U.S. Pat. No. 6,326,851), determines a digital fractional phase by passing a clock signal from a 2.4 GHz voltage controlled oscillator through a chain of inverters. Each inverter produces a clock pulse slightly delayed from the immediately previous inverter. The resulting staggered clock phases are then sampled by a reference clock. The delay of inverters are sensitive to process and temperature variations and is limited to a time resolution of 20 ps based on the state of the technology. Since the phase resolution is dependent on the timing resolution, the phase resolution is also limited.
There is an unsolved need for a phase lock loop that has more accurate phase resolution.